On a SP605 board, this is most likely the beginning of the DDR memory, Oxc0000000. What this block RAM should contain is a jump to the application’s entry point. These addresses are mapped to an FPGA block RAM. Its interrupt vectors are at near-zero addresses as well. Having that said, let’s look at the problem this functions solves: A Microblaze processor starts executing at address 0 unless told otherwise. To set up a Linux bitstream, see another post of mine. If you’re into running a Linux kernel, you’re most likely wasting your time reading this, because the Linux kernel is kicked off directly from the external RAM, and hence this mangling isn’t necessary. So what happens during this process? When is it necessary? Its icon says “BRAM INIT” which turns out to be more accurate than expected. The Xilinx Platform Studio (EDK) has this “update bitstream” function, which I wasn’t so clear about, despite its documentation page. This post was written by eli on July 30, 2011
0 Comments
Leave a Reply. |
AuthorWrite something about yourself. No need to be fancy, just an overview. ArchivesCategories |